The CAEN Mod.N6720 is a 4/2 Channel 12-bit 250 MS/s NIM Waveform Digitizer with 2 Vpp single ended input dynamics on MCX coaxial connectors. The DC offset is adjustable via a 16-bit DAC on each channel in the ±1V range.
The model is available in 4 versions: with 2 or 4 channels, different Multi event Buffer memory and different FPGA densities:
|
Version |
N6720B |
N6720D |
N6720C |
N6720E |
|---|---|---|---|---|
|
No of Channels |
4 |
4 |
2 |
2 |
|
Cyclone FPGA |
EP1C20 (20.000 LEs) |
EP1C20 (20.000 LEs) |
EP1C20 (20.000 LEs) |
EP1C20 (20.000 LEs) |
|
Memory |
1.25MS/ch |
10MS/ch |
1.25MS/ch |
10MS/ch |
The module features a front panel Clock Input and a PLL for clock synthesis from internal/external references. The data stream is continuously written in a circular memory buffer. When the trigger occurs, the FPGA writes further N samples for the post trigger and freezes the buffer that can be read by USB or Optical Link. The acquisition can continue without dead time in a new buffer.
Each channel has a SRAM Multi-Event Buffer divisible into 1 ÷ 1024 buffers of programmable size. Two sizes of the channel digital memory are available by ordering options: 1.25 MS/ch and 10 MS/ch. The readout (by USB or Optical Link) of a frozen buffer is independent from the write operations in the active circular buffer (ADC data storage). ‘Zero suppression’ and ‘data reduction’ algorithms allow substantial savings in data amount readout and processing, rejecting samples smaller than programmable thresholds. N6720 supports multi-board synchronization allowing all ADCs to be synchronized to a common clock source and ensuring Trigger time stamps alignment. Once synchronized, all data will be aligned and coherent across multiple N6720 boards.
The trigger signal can be provided externally via the front panel Trigger Input as well as via the software, but it can also be generated internally thanks to threshold self-trigger capability.
N6720 houses USB 2.0 and Optical Link interfaces. USB 2.0 allows data transfers up to 30 MB/s. The Optical Link supports transfer rate of 80 MB/s and offers Daisy chain capability. Therefore, it is possible to connect up to 8/32 ADC modules to a single Optical Link Controller (Mod. A2818).
Software available (Windows and Linux):
CAEN provides drivers for all the different types of physical communication channels, a set of C and LabView libraries (CAENComm and CAENDigitizer), demo applications and utilities:
CAENSCOPE: fully graphical program that implements a simple oscilloscope.
CAENUpgrader: tool that allows the user to update the firmware of the digitizers, change the PLL settings, load, when requested, the license for the pay firmware and other utilities.
CAEN WaveDump: software console application that can be used to configure and readout event data from any model of the CAEN digitizer family and save the data into a memory buffer allocated for this purpose.
Digital Pulse Processing firmware for Physics Applications – this special firmware allows to perform on-line processing on detector signal directly digitized:
DPP-PSD Digital Pulse Processing for Pulse Shape Discrimination
x720(*) and x751 digitizers running DPP-PSD firmware accept signals directly from the detector and implement a digital replacement of dual gate QDC, discriminator and gate generator.
(*) DPP-CI firmware and DPP-CI Control Software are no longer supported. To perform Charge Integration please refer to the DPP-PSD firmware and software
12 bit 250 MS/s ADC
FPGA for real time Digital Pulse Processing:
Zero Suppression (Waveform Recoding Firmware)
4/2 channels
MCX input (50 Ω, single ended)
2 Vpp single ended input range
16-bit programmable DC offset adjustment: ±1 V
Trigger Time stamps
Memory buffer: 1.25 MS/ch or 10 MS/ch
Programmable event size and pre-post trigger adjustment
Optical Link interface (CAEN proprietary protocol)
USB 2.0 interface
Firmware upgradeable via USB/Optical Link
Libraries, Demos (C and LabView) and Software tools for Windows and Linux