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CAEN FERS Library v1.3.0
SDK for FERS systems
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FERS board commands. More...
| #define | CMD_TIME_RESET 0x11 |
| FERS board commands. | |
| #define | CMD_ACQ_START 0x12 |
| Start acquisition. | |
| #define | CMD_ACQ_STOP 0x13 |
| Stop acquisition. | |
| #define | CMD_TRG 0x14 |
| Send software trigger. | |
| #define | CMD_RESET 0x15 |
| Global Reset (clear data, set all regs to default) | |
| #define | CMD_TPULSE 0x16 |
| Send a test pulse. | |
| #define | CMD_RES_PTRG 0x17 |
| Reset periodic trigger counter (and rearm PTRG in single pulse mode) | |
| #define | CMD_CLEAR 0x18 |
| Clear Data. | |
| #define | CMD_VALIDATION 0x19 |
| Trigger Validation (either positive = accept or negative = reject) | |
| #define | CMD_SET_VETO 0x1A |
| Set Veto. | |
| #define | CMD_CLEAR_VETO 0x1B |
| Clear Veto. | |
| #define | CMD_TDL_SYNC 0x1C |
| Sync signal from TDL. | |
| #define | CMD_USE_ICLK 0x1E |
| Use internal CLK for FPGA. | |
| #define | CMD_USE_ECLK 0x1F |
| Use external CLK for FPGA. | |
| #define | CMD_CFG_ASIC 0x20 |
| Configure ASIC (load shift register). If used, refer to FERS_configure_5202.c, at. | |
FERS board commands.
| #define CMD_TIME_RESET 0x11 |
| #define CMD_ACQ_START 0x12 |
Start acquisition.
Definition at line 190 of file FERS_Registers_520X.h.
| #define CMD_ACQ_STOP 0x13 |
Stop acquisition.
Definition at line 191 of file FERS_Registers_520X.h.
| #define CMD_TRG 0x14 |
Send software trigger.
Definition at line 192 of file FERS_Registers_520X.h.
| #define CMD_RESET 0x15 |
Global Reset (clear data, set all regs to default)
Definition at line 193 of file FERS_Registers_520X.h.
| #define CMD_TPULSE 0x16 |
Send a test pulse.
Definition at line 194 of file FERS_Registers_520X.h.
| #define CMD_RES_PTRG 0x17 |
Reset periodic trigger counter (and rearm PTRG in single pulse mode)
Definition at line 195 of file FERS_Registers_520X.h.
| #define CMD_CLEAR 0x18 |
Clear Data.
Definition at line 196 of file FERS_Registers_520X.h.
| #define CMD_VALIDATION 0x19 |
Trigger Validation (either positive = accept or negative = reject)
Definition at line 197 of file FERS_Registers_520X.h.
| #define CMD_SET_VETO 0x1A |
Set Veto.
Definition at line 198 of file FERS_Registers_520X.h.
| #define CMD_CLEAR_VETO 0x1B |
Clear Veto.
Definition at line 199 of file FERS_Registers_520X.h.
| #define CMD_TDL_SYNC 0x1C |
Sync signal from TDL.
Definition at line 200 of file FERS_Registers_520X.h.
| #define CMD_USE_ICLK 0x1E |
Use internal CLK for FPGA.
Definition at line 201 of file FERS_Registers_520X.h.
| #define CMD_USE_ECLK 0x1F |
Use external CLK for FPGA.
Definition at line 202 of file FERS_Registers_520X.h.
| #define CMD_CFG_ASIC 0x20 |
Configure ASIC (load shift register). If used, refer to FERS_configure_5202.c, at.
Definition at line 203 of file FERS_Registers_520X.h.