Sample Waveforms for PLL.vhd

Sample behavioral waveforms for design file PLL.vhd

The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design PLL.vhd. The design PLL.vhd has Cyclone AUTO pll configured in NORMAL mode The primary clock input to the PLL is INCLK0, with clock period 25000 ps.

Fig. 1 : Wave showing NORMAL mode operation.