-- -----------------------------------------------------------------------
-- V2495 User Demo firmware and template
-- -----------------------------------------------------------------------
--  Date        : 29/07/2016
--  Contact     : support.nuclear@caen.it
-- (c) CAEN SpA - http://www.caen.it   
-- -----------------------------------------------------------------------

Introduction
================

This folder contains the demo firmware projects and a template project for CAEN V2495
module. 

A demo code for the gate and delay (g&d) settings is located into the software folder.

The folder structure is:

  firmware\
    demo1_gate_pattern\V2495_GatePattern.qar
    demo2_pattern_recorder\V2495_PatRec.qar
    demo3_dac_a395e\V2495_DAC.qar
    demo4_gate_and_delay\V2495_GateDelay.qar
    template\V2495user_template.qar
  software\
    V2495_gd_test.c

Demo and Template firmware 
==========================

Each demo has its own folder.
The template folder contains the template project for new user developed
firmware targeted to the User FPGA on the V2495 board.

Demo and template projects are archived in Altera QAR format.

In order to regenerate the QuartusII project follow the following procedure:

- From the command line:

  quartus_sh --restore <QAR file name>
  
- From QuartusII GUI:

  - from the menu :
    Project->Restore Archived Project...
  
  - Select archive name correponding to the requested demo (-qar file)  
  - Select destination folder
  
All projects require at least QuartusII 13.1 or higher.
Web edition can be used to regenerate or modify all demo and template projects.

The binary file to be used for flash programming (*.rpd) is generated by
running demo or template compilation. The RPD file is located into the
output_files subfolder for the project folder.

Software 
==========================

The V2495_gd_test.c source code is a simple demo code to demonstrate
gate and delay setup. This code simplifies the procedures required to set 
the g&d values on any of the 32 g&d generator channels. 
Please note that, while it is possible to add g&d functionalities in any of the 
demo projects (and in self-developed projects), the only demo in which you will 
be able to test them without any other change is demo number 4. 
In order to profit from g&d functionalities in the other demos or in 
user-developed code (which is assumed to be based on the template project 
provided with the demos) you should:

- fill the g&d inputs signals (gd_start(31 downto 0)) in the top with the 
  signals you want to delay
- take the g&d outputs signals (gd_delayed(31 downto 0) and either readdress 
  them to one of the V2495 output ports or use them for project's internal logic
- configure the g&d values of the g&d channel(s) in use, according to the 
  procedure described in the manual (this is true also for Demo 4)

The code is based on the CAENComm library:
the code can be run on any platform that has access to a CAEN VME bridge
(V1718/V2718 board).

Please adapt the main function to host setup:
 - verify VME base address (default is 0x3210000)
 - the default link is USB, so a V1718 is expected by default.
   Uncomment the line:
   //CAENComm_OpenDevice(CAENComm_OpticalLink,0,0,0x32100000,&handle);
   to communicate with V2495 via an optical bridge (V2718)
