Programmable Logic Units boards are the FPGA-based digital equipment that you need to implement the logic capabilities of your experiment.
These boards are suitable to implement digital functions such as Coincidence, Trigger Logic, Gate and Delay generator, counters and more. We offer three different levels of programmability and user-experience, tailored for laboratory users, FPGA beginners and coding experts.
Programmable FPGA to implement complex logic functions
VHDL coding expertise not required
User-friendly software tools for board programming
Pre-programmed set of standard functions (N1081B/DT1081B)
Different I/Os connectors and standards available (NIM, TTL, ECL, LVDS)
The N1081B/DT1081B offers the most quick and easy approach to the Programmable Logic Units. It is a multi-tasking board, in NIM and Desktop format, that incorporates many pre-programmed functions. The touchscreen and web interface brings usability to the top level: just few taps or few clicks to have a scaler, a NIM/TTL generator or a Time-of-flight at your fingertips. In daily work, it is a pocketknife tool that cannot miss in a physics laboratory.
The V2495/DT5495 Programmable Logic Units offer an advanced approach concerning the FPGA programming and board customization possibility. It is possible to write and load VHDL firmware on the unit, in order to perform customized operations and adapt at best the board functions to the needs of your experimental setup.
Moreover, the units can be equipped with a series of I/Os piggyback (A395x) featuring different connectors and signal standards. The VME and Desktop form factors well fit respectively with medium-large installations and small bench setup.
The V2495/DT5495 open structure can be combined with the SCI-Compiler software for easy-FPGA programming. It is a block-diagram-based graphic tool, thought to help non-expert VHDL coders in building their own firmware.
Each block defines an operational function (like a logic port, a trigger, a discriminator, a counter…) and more blocks can be wired together to build a complex FPGA code, so that it is possible to speed up the programming effort and get quickly to the testing and using phase.
